Author:
Veneris A.,Venkataraman S.,Hajj I.N.,Fuchs W.K.
Cited by
7 articles.
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1. Physical‐aware systematic multiple defect diagnosis;IET Computers & Digital Techniques;2014-09
2. Accurate Rank Ordering of Error Candidates for Efficient HDL Design Debugging;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2009-02
3. Adaptive Diagnostic Pattern Generation for Scan Chains;4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008);2008-01
4. Analysis and methodology for multiple-fault diagnosis;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2006-03
5. Design error diagnosis in digital circuits with stuck-at fault model;Microelectronics Reliability;2000-02