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2. 1-Bit Comparator Designed by Multithreshold FinFET based Sleep Transistor Technique in 18nm;2023 International Conference on Distributed Computing and Electrical Circuits and Electronics (ICDCECE);2023-04-29
3. Static and Dynamic power optimization using Leakage Feedback approach for nanoscale CMOS VLSI circuits;2022 First International Conference on Electrical, Electronics, Information and Communication Technologies (ICEEICT);2022-02-16
4. Sleepy CMOS-Sleepy Stack (SC-SS): A Novel High Speed, Area and Power Efficient Technique for VLSI Circuit Design;Journal of Circuits, Systems and Computers;2019-11
5. Comparative Analysis of MCML Compressor with and Without Concept of Sleep Transistor;Advances in Intelligent Systems and Computing;2016