1-Bit Comparator Designed by Multithreshold FinFET based Sleep Transistor Technique in 18nm-Reference-Cited by-同舟云学术

1-Bit Comparator Designed by Multithreshold FinFET based Sleep Transistor Technique in 18nm

Published:2023-04-29 Issue: Volume: Page:
ISSN:
Container-title:2023 International Conference on Distributed Computing and Electrical Circuits and Electronics (ICDCECE)
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Author:

Rajora Ricky¹,Sharma Kulbhushan¹,Sharma Anjali²

Affiliation:

1. Chitkara University Institute of Engineering and Technology Chitkara University,VLSI Centre of Excellence,Punjab,India

2. University Institute of Technology (UIT), HPU,Department of Electronic and Communication Engineering,Shimla,Himachal Pradesh,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10150430/10150434/10151417.pdf?arnumber=10151417

Reference24 articles.

1. A super cut-off CMOS (SCCMOS) scheme for 0.5-V supply voltage with picoampere stand-by current

2. Design and Analysis of Comparator using Adiabatic ECRL and PFAL Techniques;kaur;International Journal of Advanced Computer Technology,2015

3. Design of a Low-Noise Low-Power Fourth Order Complementary Super Source Follower Filter for EEG Applications

4. A carbon nano-tube field effect transistor based stable, low-power 8T static random access memory cell with improved write access time

5. Comparative analysis of 90 nm MOSFET and 18 nm FinFET based different multiplexers for low power digital circuits;mittal;Int J Adv Sci Technol,2020

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