Study of Large Exposure Field Lithography for Advanced Chiplet Packaging

Author:

Suda Hiromi1,Shelton Douglas2,Takada Hiroki1,Goto Yoshio1,Urushihara Kosuke1,Shinoda Ken-Ichiro1

Affiliation:

1. Canon Inc.,Optical Producs Operations,Utsunomiya,Japan

2. Industrial Products Devision Canon U. S. A.,San Jose,USA

Publisher

IEEE

Reference7 articles.

1. A study of Sub-micron Fan-out Wafer Level Packaging solutions

2. Photolithography study for high-density integration technologies

3. Study of Submicron Patterning Exposure Tool for Fine 500mm Panel Size FOPLP;mori;2020 IEEE 70th Electronic Components and Technology Conference (ECTC),0

4. Sub-Micron RDL Patterning for Advanced Packaging

5. Study of Submicron Panel-Level Packaging in Mass-Production

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Study for realization of the next generation high density RDL packaging for 2.5D large silicon interposer.;2024 IEEE 74th Electronic Components and Technology Conference (ECTC);2024-05-28

2. Study of submicron-resolution, high-accuracy overlay and large-field lithography for advanced packaging;Journal of Micro/Nanopatterning, Materials, and Metrology;2024-01-02

3. Chip Partition Heterogeneous Integration and Chip Split Heterogeneous Integration;Chiplet Design and Heterogeneous Integration Packaging;2023

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