Influence of micro voids in flip chip bump on electro-migration reliability

Author:

Murayama Kei1,Oon Lee Kor2,Ono Toshiaki3,Oi Kiyoshi1,Pei Lim Sze4,Yeo Yvonne5,Sweatman Keith6,Martell Steven R.7,Shimamoto Haruo8,Tsuriya Masahiro9

Affiliation:

1. Shinko Electric Industries CO., LTD.,R & D Div.,Nagano,Japan

2. ATTD Intel Corp.,Kulim,Malaysia

3. Nordson Advanced Technology,Tokyo,Japan

4. Product Management Indium Corp,Kuala Lumpur,Malaysia

5. IBM Corporation,Systems Supply Chain,Singapore,Singapore

6. Nihon Superior Co., Ltd.,Osaka,Japan

7. Advanced Applications Support Nordson T&I - Sonoscan,Santa Clara,USA

8. AIST,Device Technology Research Institute,Tsukuba,Japan

9. iNEMI Japan,Tokyo,Japan

Publisher

IEEE

Reference11 articles.

1. Voids Inspection Capability Study in First-Level Interconnects for Flip Chip Packages

2. The last will and testament of the BGA void;hillman;SMTA International Conference,2011

3. Effects of Au and Pd in Pad Surface Finish on Electro-Migration of Flip Chip Interconnection Between Cu-Pillar and Sn-Bi Solder Alloy System

4. Comarison of Interfacial Reactions and Reliabilities of Sn3.5Ag, Sn4.0Ag0.5Cu, and Sn0.7Cu Solder Bumps on Electroless Ni-P UBMs;jeon;Proceedings of 53thECTC,2003

5. Effect of crystal anisotropy and IMCs on electro-migration resistivity of low temperature flip chip interconnect;murayama;Proceedings of ECTC 2021,2021

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Isothermal aging and electromigration reliability of Cu pillar bumps interconnections in advanced packages monitored by in-situ dynamic resistance testing;Journal of Materials Research and Technology;2024-09

2. The Effects of Voids on Solder Joint Reliability in First Level Interconnect;2022 17th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT);2022-10-26

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