Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it’s potential applications for Power-Via technologies
Author:
Affiliation:
1. National Taiwan University,Department of Mechanical Engineering,Taipei,Taiwan, R. O. C
2. National Taiwan Normal University,Graduate Institute of Electro-Optical Science and Technology,Taipei,Taiwan, R. O. C
Funder
Ministry of Science and Technology
Ministry of Education
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9816066/9816372/09816445.pdf?arnumber=9816445
Reference13 articles.
1. A Novel Differential Multi-Bit Carbon Nanotube Through Silicon Vias
2. Multi-Bit CNT TSV for 3-D ICs
3. Through-Silicon-Via Fabrication Technologies, Passives Extraction, and Electrical Modeling for 3-D Integration/Packaging
4. ABF-Based TSV Arrays With Improved Signal Integrity on 3-D IC/Interposers: Equivalent Models and Experiments
5. Remarkably enhanced thermal transport based on a flexible horizontally-aligned carbon nanotube array film
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1. The Analysis of Multiwall Carbon Nanotubes as Through Silicon Via by Equivalent Circuit Model at Different Operating Temperatures in Multilayers Stacking Scheme;IEEE Transactions on Electron Devices;2023-06
2. An inter-scale simulation method for TSV 3D IC based on linear superposition algorithm and TSV model sharing strategy;Microelectronics Reliability;2023-05
3. The Advantages of Low temperature (<400°C) Carbon Nano-Tubes (CNTs) as Through Silicon Vias (TSVs) in Multi-Layer Stacking and Backside Power-Via Application;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05
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