Optimization of PI & PBO Layers Lithography Process for High Density Fan-Out Wafer Level Packaging & Next Generation Heterogeneous Integration Applications Employing Digitally Driven Maskless Lithography-Reference-Cited by-同舟云学术

Optimization of PI & PBO Layers Lithography Process for High Density Fan-Out Wafer Level Packaging & Next Generation Heterogeneous Integration Applications Employing Digitally Driven Maskless Lithography

Published:2022-05 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)
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Author:

Uhrmann Thomas¹,Povazay Boris¹,Zenger Tobias¹,Thallner Bemd¹,Holly Roman¹,Lednicka Bozena Matuskova¹,Reybrouck Mario²,Van Herck Niels²,Persijn Bart²,Janssen Dimitri²,Vanclooster Stefan²,Heirbaut Stef²

Affiliation:

1. EV Group,St. Florian am Inn,Austria

2. FUJIFILM Electronic Materials (Europe) N.V.,Zwijndrecht,Belgium

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9816066/9816372/09816588.pdf?arnumber=9816588

Reference3 articles.

1. Resolution and depth of focus in optical lithography

2. Deca & Cadence Breakthrough Heterogeneous Integration Barriers with Adaptive Patterning™

3. Report on Status of Advanced Packaging Industry;developments,2021

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