Effects of Polycrystalline Silicon Plug Defect on DRAM Characteristics-Reference-Cited by-同舟云学术

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Effects of Polycrystalline Silicon Plug Defect on DRAM Characteristics

Published:2023-07 Issue:7 Volume:70 Page:3559-3562
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Han Dongmin¹^ORCID,Hwang Yoosang²,Choi Byoungdeog³^ORCID

Affiliation:

1. DRAM Process Integration Engineering Team, Samsung Electronics Company, Hwasung, South Korea

2. Samsung Institute of Technology Team, Samsung Electronics Company, Giheung, South Korea

3. Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon, South Korea

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/10159202/10149053.pdf?arnumber=10149053

Reference14 articles.

1. Effects of alloying elements on cobalt silicide formation

2. Process Control Technique to Dramatically Reduce Voids in Phosphorus-Doped Poly-Silicon for Trench Field-Plate MOSFETs

3. Small-Signal Analysis and Modeling of Asymmetric Source/Drain Parasitic Resistances for DRAM Access Transistors in Low-Power Applications

4. A model for conduction in polycrystalline silicon—Part I: Theory

5. Electrical analysis of DRAM cell transistors for the root-cause addressing of the tRDL time-delay failure;kim;Microelectron Rel,2003

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Novel Dual Work Function Buried Channel Array Transistor Process Design for Sub-17 nm DRAM;IEEE Access;2024

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