Design of a 5MHz 4A Half Bridge Gate Driver in 180nm BCD Process for GaN HEMT-Reference-Cited by-同舟云学术

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Design of a 5MHz 4A Half Bridge Gate Driver in 180nm BCD Process for GaN HEMT

Published:2022-10-28 Issue: Volume: Page:
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Container-title:2022 7th International Conference on Integrated Circuits and Microsystems (ICICM)
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Author:

Li Liang¹,Zhou Dejin²,Xu Yuan³,He Ningye³,Huang Wei⁴,Chen Zhenhai³

Affiliation:

1. Suzhou Vocational University,School of electronic information engineering,Suzhou,China

2. Tsinghua University,Wuxi research institute of applied technologies,Wuxi,China

3. Huangshan University,Engineering Technology Research Center of Intelligent Microsystems Anhui Province,Huangshan,China

4. Fudan University,School of Microelectronics,Shanghai,China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10011216/10011228/10011361.pdf?arnumber=10011361

Reference7 articles.

1. 25.3 A 1.3A gate driver for GaN with fully integrated gate charge buffer capacitor delivering 11nC enabled by high-voltage energy storing

2. Threshold Voltage Instability in p-GaN Gate AlGaN/GaN HFETs

3. 25.3 A 1.3A gate driver for GaN with fully integrated gate charge buffer capacitor delivering 11nC enabled by high-voltage energy storing

4. A fully integrated three-level 11.6nC gate driver supporting GaN gate injection transistors

5. A High-reliability Half-Bridge GaN FET Gate Driver with Advanced Floating Bias Control Techniques

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