Using BERT Pre-Trained Image Transformers to Identify Potential Parametric Wafer Map Defects-Reference-Cited by-同舟云学术

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Using BERT Pre-Trained Image Transformers to Identify Potential Parametric Wafer Map Defects

Published:2024-05-13 Issue: Volume:33.2 Page:1-5
ISSN:
Container-title:2024 35th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)
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Author:

Jen En¹,Ting Yiju¹,Chen Boris¹,Jan CH²,Huang Lester³,Lin ChingYu⁴,Wu Milton³,Feng Anna³,Wen Charless⁵,Chen HW⁵,Yeh Jason⁶,Lai Citi⁶

Affiliation:

1. MEDIATEK INC.,Al Dept.,Hsinchu,Taiwan

2. MEDIATEK INC,Process Engineering Div.,Hsinchu,Taiwan

3. MEDIATEK INC,Process Development Dept.,Hsinchu,Taiwan

4. MEDIATEK INC,Subcontractors Quality Engineering Dept.,Hsinchu,Taiwan

5. MEDIATEK INC,Test Engineering Dept.,Hsinchu,Taiwan

6. MEDIATEK INC,AI & Data Engineering Div.,Hsinchu,Taiwan

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx8/10545359/10545360/10545454.pdf?arnumber=10545454

Reference17 articles.

1. An Embarrassingly Simple Approach for Wafer Feature Extraction and Defect Pattern Recognition;Nitish;arXiv preprint,2023

2. New Anomaly Detection in Semiconductor Manufacturing Process using Oversampling Method;Seunghwan;ICAART,2020

3. A Wafer Map Yield Prediction Based on Machine Learning for Productivity Enhancement

4. Active learning of convolutional neural network for cost-effective wafer map pattern classification;Jaewoong;IEEE Transactions on Semiconductor Manufacturing,2020

5. Wafer-Level Test Path Pattern Recognition and Test Characteristics for Test-Induced Defect Diagnosis

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