A bidirectional NMOSFET current reduction model for simulation of hot-carrier-induced circuit degradation-Reference-Cited by-同舟云学术

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A bidirectional NMOSFET current reduction model for simulation of hot-carrier-induced circuit degradation

Published:1993 Issue:12 Volume:40 Page:2245-2254
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Quader K.N.,Li C.C.,Tu R.,Rosenbaum E.,Ko P.K.,Chenming Hu

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx1/16/6384/00249472.pdf?arnumber=249472

Cited by 35 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. The Study of Hot Carrier Effects on Double SOI NMOSFETs;Solid-State Electronics;2023-03

2. On the Reliability Estimation of Analog CMOS Circuits Based on Statistical Methods;2019 11th International Conference on Electrical and Electronics Engineering (ELECO);2019-11

3. Effect of Reverse Body Bias on Hot Carrier Induced Degradation of n-MOSFETs;IEEE Transactions on Device and Materials Reliability;2018-03

4. Characteristics and reliability of metal–oxide–semiconductor transistors with various depths of plasma-induced Si recess structure;Japanese Journal of Applied Physics;2018-02-21

5. Modelling of Degraded Power MOSFET Effects on Inverter Static Parameters;Materials Today: Proceedings;2016

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