Multiplier design based on ancient Indian Vedic Mathematics
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx5/4808358/4815668/04815685.pdf?arnumber=4815685
Cited by 41 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
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5. ASIC implementation of ECG denoising FIR filter by using hybrid Vedic–Wallace tree multiplier;International Journal of Circuit Theory and Applications;2023-11-08
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