Common-Centroid Layout for Active and Passive Devices: A Review and the Road Ahead

Author:

Karmokar Nibedita1,Madhusudan Meghna1,Sharma Arvind K.1,Harjani Ramesh1,Lin Mark Po-Hung2,Sapatnekar Sachin S.1

Affiliation:

1. University of Minnesota,USA

2. National Yang Ming Chiao Tung University,Taiwan

Publisher

IEEE

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. GNN-Based Hierarchical Annotation for Analog Circuits;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-09

2. Constructive Placement and Routing for Common-Centroid Capacitor Arrays in Binary-Weighted and Split DACs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-09

3. Testing Significance of Layout Dependent Impacts on Silicon Chips Performance;2023 3rd International Conference on Intelligent Technologies (CONIT);2023-06-23

4. Constructive Common-Centroid Placement and Routing for Binary-Weighted Capacitor Arrays;2022 Design, Automation & Test in Europe Conference & Exhibition (DATE);2022-03-14

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