An SoC Based Cost Effective Static Linearity Test Scheme for ADCs
Author:
Affiliation:
1. Infineon Technologies Semiconductor India Pvt Ltd,Automotive Divison,Bengaluru,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10235328/10235351/10235360.pdf?arnumber=10235360
Reference10 articles.
1. Ultrafast stimulus error removal algorithm for ADC linearity test
2. ADC integral non-linearity testing with low linearity monotonic signals
3. Effect of flicker noise on SEIR for accurate ADC linearity testing;zhuang;2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS),2015
4. Test time reduction of successive approximation register A/D converter by selective code measurement
5. Algorithm for dramatically improved efficiency in ADC linearity test
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