Impact of Sequential Design on the Cost of Adiabatic Quantum-Flux Parametron Circuits
Author:
Affiliation:
1. Integrated Systems Laboratory, Swiss Federal Institute of Technology Lausanne, Lausanne, Switzerland
2. Institute of Advanced Sciences, Yokohama National University, Yokohama, Japan
Funder
SNF
Supercool: Design methods and tools for superconducting electronics
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/77/10214413/10229158.pdf?arnumber=10229158
Reference29 articles.
1. Design and Implementation of a 16-Word by 1-Bit Register File Using Adiabatic Quantum Flux Parametron Logic
2. Adiabatic quantum-flux-parametron with delay-line clocking: logic gate demonstration and phase skipping operation
3. MANA: A Monolithic Adiabatic iNtegration Architecture Microprocessor Using 1.4-zJ/op Unshunted Superconductor Josephson Junction Devices
4. Logic Synthesis of Sequential Logic Circuits for Adiabatic Quantum-Flux-Parametron Logic
5. Buffer Reduction Via N-Phase Clocking in Adiabatic Quantum-Flux-Parametron Benchmark Circuits
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