A 10-gb/s CMOS clock and data recovery circuit with an analog phase interpolator-Reference-Cited by-同舟云学术

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A 10-gb/s CMOS clock and data recovery circuit with an analog phase interpolator

Published:2005-03 Issue:3 Volume:40 Page:736-743
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Kreienkamp R.,Langmann U.,Zimmermann C.,Aoyama T.,Siedhoff H.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/30536/01408094.pdf?arnumber=1408094

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