Low-Power Circuits for a 2.5-V, 10.7-to-86-Gb/s Serial Transmitter in 130-nm SiGe BiCMOS-Reference-Cited by-同舟云学术

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Low-Power Circuits for a 2.5-V, 10.7-to-86-Gb/s Serial Transmitter in 130-nm SiGe BiCMOS

Published:2007-10 Issue:10 Volume:42 Page:2077-2085
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Dickson Timothy O.,Voinigescu Sorin P.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/4317684/04317691.pdf?arnumber=4317691

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 6-bit Segmented DAC Architecture With up to 56-GHz Sampling Clock and 6-VppDifferential Swing;IEEE Transactions on Microwave Theory and Techniques;2016

2. A 70–100 GHz Direct-Conversion Transmitter and Receiver Phased Array Chipset Demonstrating 10 Gb/s Wireless Link;IEEE Journal of Solid-State Circuits;2013-05

3. A 1.8 V SiGe BiCMOS Cable Equalizer with 40-dB Peaking Control up to 60 GHz;2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS);2012-10

4. A 2.4-$\hbox{V} _{\rm pp}$ 60-Gb/s CMOS Driver With Digitally Variable Amplitude and Pre-Emphasis Control at Multiple Peaking Frequencies;IEEE Journal of Solid-State Circuits;2011-10

5. A cable equalizer with 31 dB of adjustable peaking at 52 GHz;2009 IEEE Bipolar/BiCMOS Circuits and Technology Meeting;2009-10

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