A 1-GS/s 6-Bit Two-Channel Two-Step ADC in 0.13-$\mu$m CMOS-Reference-Cited by-同舟云学术

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A 1-GS/s 6-Bit Two-Channel Two-Step ADC in 0.13-$\mu$m CMOS

Published:2009-11 Issue:11 Volume:44 Page:3051-3059
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Chen Hung-Wei,Chen I-Ching,Tseng Huan-Chieh,Chen Hsin-Shu

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/5308580/05308598.pdf?arnumber=5308598

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 12-Bit 100-MS/s Subrange SAR ADC With a Foreground Offset Tracking Calibration Scheme;IEEE Transactions on Circuits and Systems II: Express Briefs;2019-07

2. Review of Analog-To-Digital Conversion Characteristics and Design Considerations for the Creation of Power-Efficient Hybrid Data Converters;Journal of Low Power Electronics and Applications;2018-04-30

3. A Dynamic Zoom ADC With 109-dB DR for Audio Applications;IEEE Journal of Solid-State Circuits;2017-06

4. A 10-Bit 200 MS/s Capacitor-Sharing Pipeline ADC;IEEE Transactions on Circuits and Systems I: Regular Papers;2013-11

5. A reference-free 7-bit 500 MS/s pipeline ADC using current-mode reference shifting and quantizers with built-in thresholds;Analog Integrated Circuits and Signal Processing;2013-02-07

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