A Fully Integrated Fast Transient Dual-Loop Digital LDO Based on Adaptive Clock Frequency for Voltage Regulation Applications-Reference-Cited by-同舟云学术

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A Fully Integrated Fast Transient Dual-Loop Digital LDO Based on Adaptive Clock Frequency for Voltage Regulation Applications

Published:2022-10-25 Issue: Volume: Page:
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Container-title:2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)
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Author:

Duan Xichen¹,Wang Yuzi¹,Zhang Liuyang²,Liang Jie¹

Affiliation:

1. Shanghai University,School of Microelectronics,Shanghai,China,201899

2. Peng Cheng Laboratory,Shenzhen,China,518055

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9962815/9963138/09963148.pdf?arnumber=9963148

Reference4 articles.

1. A Novel Beat-Frequency Time Quantizer With Zero Steady-State Offset For Fully Integrated Digital LDOs

2. A Fully Integrated Digital LDO With Coarse–Fine-Tuning and Burst-Mode Operation

3. 0.5-V input digital LDO with 98.7% current efficiency and 2.7-A quiescent current in 65nm CMOS;okuma;IEEE CICC,2010

4. 8.6 Enabling wide autonomous DVFS in a 22nm graphics execution core using a digitally controlled hybrid LDO/switched-capacitor VR with fast droop mitigation

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Transient-Enhanced Digital-LDO With Adaptive Clock-Edge Control;2023 IEEE 15th International Conference on ASIC (ASICON);2023-10-24

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