8.6 Enabling wide autonomous DVFS in a 22nm graphics execution core using a digitally controlled hybrid LDO/switched-capacitor VR with fast droop mitigation

Author:

Kim Stephen T.,Shih Yi-Chun,Mazumdar Kaushik,Jain Rinkle,Ryan Joseph F.,Tokunaga Carlos,Augustine Charles,Kulkarni Jaydeep P.,Ravichandran Krishnan,Tschanz James W.,Khellah Muhammad M.,De Vivek

Publisher

IEEE

Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Digital vs Analog Low Dropout Regulators a Comparative Study;Digital Technologies and Applications;2023

2. A Fully Integrated Fast Transient Dual-Loop Digital LDO Based on Adaptive Clock Frequency for Voltage Regulation Applications;2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT);2022-10-25

3. Pulse-width Modulation Technique for Generation of Multiple Analog Voltages for On-chip Calibration;2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID);2022-02

4. Wide-Range Many-Core SoC Design in Scaled CMOS: Challenges and Opportunities;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-05

5. An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and ${V}_{\text{MIN}}$ Optimization;IEEE Journal of Solid-State Circuits;2019-01

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