Machine Learning-Assisted Compact Modeling of W-Doped Indium Oxide Channel Transistor for Back-End-of-Line Applications
Author:
Affiliation:
1. School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/10382412/10197308.pdf?arnumber=10197308
Reference18 articles.
1. International Series on Advances in Solid State Electronics and Technology
2. A Simple Semiempirical Short-Channel MOSFET Current–Voltage Model Continuous Across All Regions of Operation and Employing Only Physical Parameters
3. An Integral Charge Control Model of Bipolar Transistors
4. Back-End-of-Line Compatible Transistors for Monolithic 3-D Integration
5. BEOL Compatible Dual-Gate Ultra Thin-Body W-Doped Indium-Oxide Transistor with Ion = 370μA/μm, SS = 73mV/dec and Ion /Ioff Ratio > 4×109
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1. Neural Network Assisted Si-on-Nothing MOSFET Current-Voltage Modeling with Incremental Learning;2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM);2024-03-03
2. An Aging Small-Signal Model for Degradation Prediction of Microwave Heterojunction Bipolar Transistor S-Parameters Based on Prior Knowledge Neural Network;Micromachines;2023-10-30
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