Author:
Bai Yuxin,Yu Shilin,Ma Liping,Wang Ni,Sun Jingyi,Chen Xin
Cited by
3 articles.
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1. Physical Insight into Single-Event Upsets of DICE Circuits and Hardening Strategy;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
2. Low-Overhead Triple-Node-Upset-Tolerant Latch Design in 28-nm CMOS;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-07
3. A New Scheme of the Low-Cost Multiple-Node-Upset-Tolerant Latch;IEEE Transactions on Device and Materials Reliability;2022-03