Decoder-Side Motion Vector Refinement in VVC: Algorithm and Hardware Implementation Considerations-Reference-Cited by-同舟云学术

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Decoder-Side Motion Vector Refinement in VVC: Algorithm and Hardware Implementation Considerations

Published:2021-08 Issue:8 Volume:31 Page:3197-3211
ISSN:1051-8215
Container-title:IEEE Transactions on Circuits and Systems for Video Technology
language:
Short-container-title:IEEE Trans. Circuits Syst. Video Technol.

Author:

Gao Han^ORCID,Chen Xu,Esenlik Semih,Chen Jianle^ORCID,Steinbach Eckehard^ORCID

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Media Technology

Link

http://xplorestaging.ieee.org/ielx7/76/9505291/09252910.pdf?arnumber=9252910

Cited by 17 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An 8K@120fps Hardware Implementation for Decoder-Side Motion Vector Refinement in VVC;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

2. Asymmetric Motion Vector Refinement for Future Video Coding;2024 Data Compression Conference (DCC);2024-03-19

3. Object Segmentation-Assisted Inter Prediction for Versatile Video Coding;IEEE Transactions on Broadcasting;2024

4. A Hardware-efficient Unified Motion Estimation for Video Coding;Proceedings of the 31st ACM International Conference on Multimedia;2023-10-26

5. Machine Learning Based Fast QTMTT Partitioning Strategy for VVenC Encoder in Intra Coding;Electronics;2023-03-11

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