An 8K@120fps Hardware Implementation for Decoder-Side Motion Vector Refinement in VVC
Author:
Affiliation:
1. Fudan University,School of Microelectronics,Shanghai,China
2. East China Normal University,School of Integrated Circuits,Shanghai,China
Funder
National Natural Science Foundation of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10557746/10557828/10558396.pdf?arnumber=10558396
Reference11 articles.
1. Overview of the Versatile Video Coding (VVC) Standard and its Applications
2. Subblock-Based Motion Derivation and Inter Prediction Refinement in the Versatile Video Coding Standard
3. Decoder-side block motion estimation for H.264 / MPEG-4 AVC based video coding
4. Decoder-Side Motion Vector Derivation for Block-Based Video Coding
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