Graph-OPU: A Highly Integrated FPGA-Based Overlay Processor for Graph Neural Networks
Author:
Affiliation:
1. Fudan University,State Key Lab of ASIC & System,Shanghai,China
2. College of Physics and Information Engineering, Fuzhou University,Fuzhou,China
Funder
National Key Research and Development Program of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10296174/10296123/10296283.pdf?arnumber=10296283
Reference37 articles.
1. Spectral Networks and Locally Connected Networks on Graphs;bruna;ArXiv,2014
2. Graph learning and its applications: A holistic survey;wei;ArXiv,2023
3. Automating the design flow under dynamic partial reconfiguration for hardware-software co-design in FPGA SoC
4. QEGCN: An FPGA-based accelerator for quantized GCNs with edge-level parallelism
5. Graph Attention Networks;veli?kovi?;ArXiv,2018
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