Cryogenic CMOS for Qubit Control and Readout

Author:

Pellerano Stefano1,Subramanian Sushil1,Park Jong-Seok1,Patra Bishnu1,Mladenov Todor1,Xue Xiao2,Vandersypen Lieven M. K.2,Babaie Masoud2,Charbon Edoardo3,Sebastiano Fabio2

Affiliation:

1. Intel Corporation,OR,USA

2. Delft University of Technology,The Netherlands

3. EPFL, Lausanne,Switzerland

Publisher

IEEE

Reference51 articles.

1. A Fully Integrated Cryo-CMOS SoC for State Manipulation, Readout, and High-Speed Gate Pulsing of Spin Qubits

2. Rapid solution of problems by quantum computation;deutsch;Proc R Soc Lond A,0

3. A 2.7mW 45fsrms-Jitter Cryogenic Dynamic-Amplifier-Based PLL for Quantum Computing Applications

4. Millikelvin temperature cryo-CMOS multiplexer for scalable quantum device characterization;potocnik;Quantum Science and Technology,2021

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3. Design of Cryogenic Circulator in 65-nm CMOS Technology Using All-Pass Filter Architecture;2023 IEEE Microwaves, Antennas, and Propagation Conference (MAPCON);2023-12-11

4. The Effect of Cryogenic Temperatures on the Lateral Heat Spreading in InGaAs/InP HEMTs;IEEE Transactions on Electron Devices;2023-08

5. Cryogenic CMOS for Quantum Processing: 5-nm FinFET-Based SRAM Arrays at 10 K;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-08

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