Author:
Kosaraju N.M.,Varanasi M.,Mohanty S.P.
Cited by
4 articles.
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1. VLSI Architectures for Security Analysis with Dual-Key LFSR Using Barrel Shifter and S-Box;2023 International Conference on Recent Advances in Electrical, Electronics, Ubiquitous Communication, and Computational Intelligence (RAEEUCCI);2023-04-19
2. FPGA Implementation of Enhanced Throughput Design of AES Architecture using Nikhilam Sutra;International Journal of Electrical Engineering and Computer Science;2022-10-31
3. A secure digital camera architecture for integrated real-time digital rights management;Journal of Systems Architecture;2009-10
4. Low-power and area-optimized VLSI implementation of AES coprocessor for Zigbee system;The Journal of China Universities of Posts and Telecommunications;2009-06