200-MHz superscalar RISC microprocessor
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx4/4/11741/00542312.pdf?arnumber=542312
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2. Clock Skew Scheduling for Improved Reliability*** This research was supported in part by the National Science Foundation under Grant No. MIP-9423886 and Grant No. MIP-9610108, a grant from the New York State Science and Technology Foundation to the Center for Advanced Technology-Electronic Imaging Systems, and by grants from the Xerox Corporation, IBM Corporation, and Intel Corporation.;The Electrical Engineering Handbook;2005
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4. Power characteristics of inductive interconnect;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2004-12
5. Power, Clock, and Global Signal Distribution;Interconnect Technology and Design for Gigascale Integration;2003
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