An Efficient VLSI Implementation of Distributed Architecture for DWT-Reference-Cited by-同舟云学术

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An Efficient VLSI Implementation of Distributed Architecture for DWT

Published:2006-10 Issue: Volume: Page:
ISSN:
Container-title:2006 IEEE Workshop on Multimedia Signal Processing
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Author:

Cao Xixin,Xie Qingqing,Peng Chungan,Wang Qingchun,Yu Dunshan

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/4064504/4064505/04064581.pdf?arnumber=4064581

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Area Efficient Multiplier-less 2D DWT Architecture using Kogge Stone Adder;2022 6th International Conference on Trends in Electronics and Informatics (ICOEI);2022-04-28

2. Design VLSI Architecture for 2_D DWT Using NEDA and KSA Technique;Lecture Notes in Electrical Engineering;2021

3. A Comparative Analysis on Hardware System of 2D Discrete Wavelet Transformation for the Image Denoising Application;International Conference on Intelligent Data Communication Technologies and Internet of Things (ICICI) 2018;2018-12-21

4. High Speed Area Optimized Hybrid DA Architecture for 2D-DTCWT;International Journal of Image and Graphics;2018-01

5. Result-Biased Distributed-Arithmetic-Based Filter Architectures for Approximately Computing the DWT;IEEE Transactions on Circuits and Systems I: Regular Papers;2015-08

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