First foundry platform of complementary tunnel-FETs in CMOS baseline technology for ultralow-power IoT applications: Manufacturability, variability and technology roadmap-Reference-Cited by-同舟云学术

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First foundry platform of complementary tunnel-FETs in CMOS baseline technology for ultralow-power IoT applications: Manufacturability, variability and technology roadmap

Published:2015-12 Issue: Volume: Page:
ISSN:
Container-title:2015 IEEE International Electron Devices Meeting (IEDM)
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Author:

Huang Qianqian,Jia Rundong,Chen Cheng,Zhu Hao,Guo Lingyi,Wang Junyao,Wang Jiaxin,Wu Chunlei,Wang Runsheng,Bu Weihai,Kang Jing,Wang Wenbo,Wu Hanming,Lee Shiuh-Wuu,Wang Yangyuan,Huang Ru

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7402013/7409598/07409756.pdf?arnumber=7409756

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3. Charge-plasma-based inverted T-shaped source-metal dual-line tunneling FET with improved performance at 0.5 V operation;Physica Scripta;2023-08-09

4. Architectural evaluation of programmable transistor-based capacitorless DRAM for high-speed system-on-chip applications;Japanese Journal of Applied Physics;2023-01-31

5. A non-interactive verifiable computation model of perceptual layer data based on CP-ABE;2022 2nd International Conference on Consumer Electronics and Computer Engineering (ICCECE);2022-01-14

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