Performance Comparison of CMOS Based Voltage Reference Circuits in 180nm Technology
Author:
Affiliation:
1. University School of Information, Communication & Technology Guru Gobind Singh Indraprastha University,New Delhi,India,110078
2. National Institute of Technology,Department of Electronics and Communication,Delhi,India,110036
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10440964/10440724/10441359.pdf?arnumber=10441359
Reference22 articles.
1. A 67-pW, -162-dB PSRR multi-output voltage reference with multi-loop active load for wireless sensor nodes
2. A 114-pW PMOS-only, trim-free voltage reference with 0.26% within-wafer inaccuracy for nW systems
3. A 420 fW self-regulated 3T voltage reference generator achieving 0.47%/V line regulation from 0.4-to-1.2 V
4. A Portable 2-Transistor Picowatt Temperature-Compensated Voltage Reference Operating at 0.5 V
5. A 0.7-V 28-nW CMOS Subthreshold Voltage and Current Reference in One Simple Circuit
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