A 15-Gb/s 0.0037-mm² 0.019-pJ/Bit Full-Rate Programmable Multi-Pattern Pseudo-Random Binary Sequence Generator

Author:

Hu JunfengORCID,Zhang ZhaoORCID,Pan QuanORCID

Funder

Research and Development Program in Key Areas of Guangdong Province

Science and Technology Plan of Shenzhen

SUSTech-ZTE Research

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. 16.8 Gbps Fully-Differential Pseudorandom Bit Sequence Generator Exploiting Asynchronous XOR Gate with an FOM of 1.1 pJ/bit on 65-nm CMOS;2024 13th International Conference on Modern Circuits and Systems Technologies (MOCAST);2024-06-26

2. 27 Gb/s PRBS Generator with In-Operation Programmable Taps for PMCW Radar;2024 IEEE 24th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF);2024-01-21

3. A Compact Low-Power 29 Gb/s Pseudo Random Quaternary Sequence Generator in 65 nm CMOS;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06

4. Ultra-low-power one-hot transmission-gate multiplexer (OTG-MUX) scalable into large fan-in circuits in 28 nm CMOS;Integration;2024-01

5. Design of an E-TSPC Flip-Flop for a 43 Gb/s PRBS Generator in 22 nm FDSOI;2023 18th European Microwave Integrated Circuits Conference (EuMIC);2023-09-18

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