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Offset-Calibration With Time-Domain Comparators Using Inversion-Mode Varactors

  • Published:2020-01 Issue:1 Volume:67 Page:47-51
  • ISSN:1549-7747
  • Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
  • language:
  • Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Fiorelli RafaellaORCID,Delgado-Restituto ManuelORCID,Rodriguez-Vazquez AngelORCID

Funder

Ministerio de Economía y Competitividad

Office of Naval Research

European Regional Development Fund

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 66 $\mu \mathrm{W}$ Asynchronous Time-Domain Bulk-Tuned Offset Cancellation Circuit for High-Precision Dynamic Comparator;2024 31st International Conference on Mixed Design of Integrated Circuits and System (MIXDES);2024-06-27

2. A 0.5 V 10-bit SAR ADC with offset calibrated time-domain comparator;AEU - International Journal of Electronics and Communications;2024-05

3. A Dynamic Offset Reduction Technique to Mitigate the Effect of Threshold Mismatch in Energy Efficient Comparators;IEEE Access;2024

4. A Single Capacitor-Based Offset Reduction Technique for Energy-Efficient Dynamic Comparators;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

5. A 0.5-V 10-bit Asynchronous SAR ADC with Monotonic Switching for Biomedical Applications;2023 Argentine Conference on Electronics (CAE);2023-03-09
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