TiNNA: A Tiny Accelerator for Neural Networks With Efficient DSP Optimization
Author:
Affiliation:
1. School of Microelectronics, Guangdong University of Technology, Guangzhou, China
Funder
Key-Area Research and Development Program of Guangdong Province
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/9741739/09711575.pdf?arnumber=9711575
Reference20 articles.
1. A Resource-Limited Hardware Accelerator for Convolutional Neural Networks in Embedded Vision Applications
2. NullHop: A Flexible Convolutional Neural Network Accelerator Based on Sparse Representations of Feature Maps
3. Snowflake: An efficient hardware accelerator for convolutional neural networks
4. Going Deeper with Embedded FPGA Platform for Convolutional Neural Network
5. Block Convolution: Towards Memory-Efficient Inference of Large-Scale CNNs on FPGA
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