Area–Delay–Power Efficient Carry-Select Adder
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/6832670/06804682.pdf?arnumber=6804682
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1. Implementation of Carry Look Ahead Adder with 2-bit Approximate Adder;2023 2nd International Conference on Applied Artificial Intelligence and Computing (ICAAIC);2023-05-04
2. Design of FIR Filter Using Low-Power and High-Speed Carry Select Adder for Low-Power DSP Applications;IETE Journal of Research;2023-04-25
3. Design of Arithmetic Circuits Using an Approximation Computing;2023 9th International Conference on Advanced Computing and Communication Systems (ICACCS);2023-03-17
4. A 90 nm area and power efficient Carry Select Adder using 2–1 multiplexer based Excess-1 block;Engineering Research Express;2023-03-01
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