A Compact Hardware Architecture for Bilateral Filter With the Combination of Approximate Computing and Look-Up Table-Reference-Cited by-同舟云学术

A Compact Hardware Architecture for Bilateral Filter With the Combination of Approximate Computing and Look-Up Table

Published:2022-07 Issue:7 Volume:69 Page:3324-3328
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Yao Ruoheng¹^ORCID,Chen Lei¹,Dong Pingcheng¹,Chen Zhuoyu¹^ORCID,An Fengwei²^ORCID

Affiliation:

1. School of Microelectronics, Southern University of Science and Technology, Shenzhen, China

2. School of Microelectronics and the Engineering Research Center of Integrated Circuits for Next-Generation Communications, Ministry of Education, Southern University of Science and Technology, Shenzhen, China

Funder

Science, Technology, and Innovation Commission of Shenzhen Municipality

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/9809796/09733932.pdf?arnumber=9733932

Reference22 articles.

1. Fast Bilateral Filter With Arbitrary Range and Domain Kernels

2. Speeding Up the Bilateral Filter: A Joint Acceleration Way

3. Fast and Provably Accurate Bilateral Filtering

4. Hardware implementation of fast bilateral filter and canny edge detector using Raspberry Pi for telemedicine applications

5. Hardware-Efficient Bilateral Filtering for Stereo Matching

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