Subsampling Architecture for Low Power Receivers
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx5/8920/4490082/04474108.pdf?arnumber=4474108
Cited by 28 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. 0.4-1 GHz Subsampling Mixer-First RF Front-End With 50-dB HRR, +10-dBm IB-IIP3 in 65-nm CMOS;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-07
2. A 164-$\mu$ W 915-MHz Sub-Sampling Phase-Tracking Zero-IF Receiver With 5-Mb/s Data Rate for Short-Range Applications;IEEE Journal of Solid-State Circuits;2022-09
3. Digitally Intensive Sub-sampling Mixer-First Direct Down-Conversion Receiver Architecture;2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS);2022-08-07
4. A Process Scalable Architecture for Low Noise Figure Sub-Sampling Mixer-First RF Front-End;2021 IEEE International Symposium on Circuits and Systems (ISCAS);2021-05
5. Multifunction, Multiband, and Multimode Wireless Receivers: A Path Toward the Future;IEEE Microwave Magazine;2020-12
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