Dedicated FPGA Implementation of the Gaussian TinyYOLOv3 Accelerator
Author:
Affiliation:
1. Department of Electrical and Information Engineering and the Research Center for Electrical and Information Technology, Seoul National University of Science and Technology, Seoul, South Korea
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/10262390/10163929.pdf?arnumber=10163929
Reference21 articles.
1. A YOLO v3-tiny FPGA Architecture using a Reconfigurable Hardware Accelerator for Real-time Region of Interest Detection
2. Hardware Accelerator for Object Detection using Tiny YOLO-v3
3. AdderNet: Do We Really Need Multiplications in Deep Learning?
4. Quantization and Training of Neural Networks for Efficient Integer-Arithmetic-Only Inference
5. Microsoft COCO: Common Objects in Context
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