A 40nm 1Mb 35.6 TOPS/W MLC NOR-Flash Based Computation-in-Memory Structure for Machine Learning-Reference-Cited by-同舟云学术

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A 40nm 1Mb 35.6 TOPS/W MLC NOR-Flash Based Computation-in-Memory Structure for Machine Learning

Published:2021-05 Issue: Volume: Page:
ISSN:
Container-title:2021 IEEE International Symposium on Circuits and Systems (ISCAS)
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Author:

Zhang Yuxin,Zeng Sitao,Zhu Zhiguo,Qin Zhaolong,Wang Chen,Li Jingjing,Zhang Sanfeng,He Yajuan,Dou Chunmeng,Si Xin,Chang Meng-Fan,Li Qiang

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9401028/9401051/09401600.pdf?arnumber=9401600

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An Adaptive Read Control Voltage Scheme for Reliability Enhancement of Flash-Based In-Memory Computing Architecture for Neural Network;IEEE Transactions on Device and Materials Reliability;2024-09

2. A Performance-driven Neural Network Compiler for Multi-core Computing-In-Memory Accelerator;2023 IEEE 15th International Conference on ASIC (ASICON);2023-10-24

3. Simulation of a Fully Digital Computing-in-Memory for Non-Volatile Memory for Artificial Intelligence Edge Applications;Micromachines;2023-05-31

4. Hardware Efficient Reconfigurable Logic-in-Memory Circuit Based Neural Network Computing;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

5. A 55nm 32Mb Digital Flash CIM Using Compressed LUT Multiplier and Low Power WL Voltage Trimming Scheme for AI Edge Inference;2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS);2022-11-11

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