FPGA Benchmarking Structures Dedicated to TID Parametric Degradation Evaluation
Author:
Affiliation:
1. UMR-CNRS 5214, University of Montpellier, Montpellier, France
Funder
Region Occitanie and the European Union via European Regional Development Fund
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Nuclear Energy and Engineering,Nuclear and High Energy Physics
Link
http://xplorestaging.ieee.org/ielx7/23/9830888/09787511.pdf?arnumber=9787511
Reference16 articles.
1. TID Evaluation System With On-Chip Electron Source and Programmable Sensing Mechanisms on FPGA
2. Radiation qualification of electronics components used for the ATLAS level-1 muon endcap trigger system
3. Bridging methodology from component to system-level for the assessment of radiation effects in digital systems;lopes,0
4. A run-time built-in approach of TID test in SRAM based FPGAs
5. FPGA static timing analysis enhancement based on real operating conditions
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