A Soft-Error Hardened by Design Microprocessor Implemented on Bulk 12-nm FinFET CMOS-Reference-Cited by-同舟云学术

A Soft-Error Hardened by Design Microprocessor Implemented on Bulk 12-nm FinFET CMOS

Published:2022-07 Issue:7 Volume:69 Page:1602-1609
ISSN:0018-9499
Container-title:IEEE Transactions on Nuclear Science
language:
Short-container-title:IEEE Trans. Nucl. Sci.

Author:

Clark Lawrence T.¹^ORCID,Duvnjak Alen²^ORCID,Cannon Matthew³^ORCID,Brunhaver John¹,Agarwal Sapan³^ORCID,Manuel Jack E.³,Wilson Donald¹,Barnaby Hugh¹^ORCID,Marinella Matthew³^ORCID

Affiliation:

1. School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ, USA

2. Department of Electrical, Computer, and Energy Engineering, ASU, Tempe, AZ, USA

3. Sandia National Laboratories, Albuquerque, New Mexico

Funder

Sandia National Laboratories

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Nuclear Energy and Engineering,Nuclear and High Energy Physics

Link

https://ieeexplore.ieee.org/ielam/23/9830888/9781434-aam.pdf

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