Analog in-memory subthreshold deep neural network accelerator-Reference-Cited by-同舟云学术

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Analog in-memory subthreshold deep neural network accelerator

Published:2017-04 Issue: Volume: Page:
ISSN:
Container-title:2017 IEEE Custom Integrated Circuits Conference (CICC)
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Author:

Fick L.,Blaauw D.,Sylvester D.,Skrzyniarz S.,Parikh M.,Fick D.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7986634/7993450/07993629.pdf?arnumber=7993629

Cited by 19 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. FETs for Analog Neural MACs;IEEE Access;2024

2. A Binary-Activation, Multi-Level Weight RNN and Training Algorithm for ADC-/DAC-Free and Noise-Resilient Processing-in-Memory Inference With eNVM;IEEE Transactions on Emerging Topics in Computing;2023-04-01

3. Dynamic Precision Analog Computing for Neural Networks;IEEE Journal of Selected Topics in Quantum Electronics;2023-03

4. Most Resource Efficient Matrix Vector Multiplication on FPGAs;IEEE Access;2023

5. A Mini Tutorial of Processing in Memory: From Principles, Devices to Prototypes;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-07

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