Characteristics Fluctuation of Sub-3-nm Bulk FinFET Devices Induced by Random Interface Traps
Author:
Affiliation:
1. National Yang Ming Chiao Tung University,Parallel and Scientific Computing Laboratory, Electrical Engineering and Computer Science International Graduate Program,Hsinchu,Taiwan,300093
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10231127/10231154/10231216.pdf?arnumber=10231216
Reference30 articles.
1. Germanium channel MOSFETs: Opportunities and challenges
2. Nanoscale germanium MOS Dielectrics-part I: germanium oxynitrides
3. Random telegraph noise in gate-all-around silicon nanowire MOSFETs induced by a single charge trap or random interface traps
4. Performance characteristics of strained Ge p-FinFETs under the integration of lattice and self-heating stress enabled by process-oriented finite element simulation
5. All Operation Region Characterization and Modeling of Drain and Gate Current Mismatch in 14-nm Fully Depleted SOI MOSFETs
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