An Approximate Low-Power Lifting Scheme Using Reversible Logic-Reference-Cited by-同舟云学术

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An Approximate Low-Power Lifting Scheme Using Reversible Logic

Published:2020 Issue: Volume:8 Page:183367-183377
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Raveendran Sithara^ORCID,Edavoor Pranose J.^ORCID,Kumar Nithin Y. B.^ORCID,Vasantha M. H.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science

Link

http://xplorestaging.ieee.org/ielx7/6287639/8948470/09214835.pdf?arnumber=9214835

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Realized High-Performance Swing Compensator Approximate Reversible Full Adders Using Gate Diffusion Input Technique;Arabian Journal for Science and Engineering;2024-01-24

2. High-efficient reversible full adder realized by dynamic threshold-based gate diffusion input logics;Microelectronics Journal;2023-12

3. Design of Arithmetic Logic Unit Using Hybrid Power Reduction Methodologies For Super Computer Applications;2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT);2023-07-06

4. Floating Point Adder using Inexact Mantissa Adder;2023 4th International Conference on Computing and Communication Systems (I3CS);2023-03-16

5. Area-Time Efficient of 2-D DWT using Modified DA Technique and Reversible Gate;2022 IEEE 3rd Global Conference for Advancement in Technology (GCAT);2022-10-07

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