All-Bit-Line Read Scheme With Locking Bit-Line and Amplifying Sense Node in NAND Flash-Reference-Cited by-同舟云学术

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All-Bit-Line Read Scheme With Locking Bit-Line and Amplifying Sense Node in NAND Flash

Published:2021 Issue: Volume:9 Page:28001-28011
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

An Jun Ho^ORCID,Chun Jin Young,Park Hyun Kook^ORCID,Jung Seong-Ook^ORCID

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science

Link

http://xplorestaging.ieee.org/ielx7/6287639/9312710/09351932.pdf?arnumber=9351932

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Valid Experimental Design of the Lifetime Prediction for NAND Cell Oxide;2024 IEEE International Reliability Physics Symposium (IRPS);2024-04-14

2. High-Density 3-D NAND Cell Array Design With Hybrid Bonding;IEEE Transactions on Electron Devices;2023-11

3. High-Precision and Low-Power Offset Canceling Tri-State Sensing Latch in NAND Flash Memory;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-07

4. Design of Ferroelectric-Metal Field-Effect Transistor for Multi-Level-Cell 3D NAND Flash;2023 IEEE International Memory Workshop (IMW);2023-05

5. A 30% Power Reduction Circuit Design for NAND Flash by Utilizing 1.2V I/O Power Supply to Bitline Path;2022 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia);2022-11-11

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