Author:
Rao K. Deergha,Gangadhar Ch.,Korrai Praveen K
Cited by
14 articles.
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1. A Low-Complexity Design for Complex Multiplication Using Radix-4 Booth Encoding;2024 IEEE 4th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA);2024-05-17
2. Design of a Vedic Multiplier based 64-bit Multiplier Accumulator Unit;2024 5th International Conference on Innovative Trends in Information Technology (ICITIIT);2024-03-15
3. A Hybrid Approach to Optimized n-bit Multiplier Design on FPGA Leveraging Recursive-Wallace Tree with AI Centric Enhancements for FIR Filters and Neural Network Inference;2023 International Conference on Next Generation Electronics (NEleX);2023-12-14
4. Efficient Implementation of Complex Multipliers on FPGAs Using DSP Slices;Journal of Signal Processing Systems;2023-04
5. All-Optical N-Bit Reversible Complex Multiplier;2022 8th International Conference on Signal Processing and Communication (ICSC);2022-12-01