Endurance Improvement of Si FeFET by a Fully CMOS-Compatible Process: Insertion of HfO x at Hf0.5Zr0.5O2/SiO x Interface to Suppress Oxygen Vacancy Generation-Reference-Cited by-同舟云学术

Endurance Improvement of Si FeFET by a Fully CMOS-Compatible Process: Insertion of HfO_x at Hf_0.5Zr_0.5O₂/SiO_x Interface to Suppress Oxygen Vacancy Generation

Published:2022-12 Issue:12 Volume:69 Page:7156-7160
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Chai Junshuai¹^ORCID,Xu Hao¹^ORCID,Xiang Jinjuan¹^ORCID,Zhang Yuanyuan²^ORCID,Zhao Shujing¹^ORCID,Tian Fengbin¹^ORCID,Duan Jiahui¹^ORCID,Han Kai³^ORCID,Wang Xiaolei¹^ORCID,Luo Jun¹^ORCID,Wang Wenwu¹,Ye Tianchun¹^ORCID

Affiliation:

1. Key Laboratory of Microelectronics Devices and Integrated Technology, Institute ofMicroelectronics, Chinese Academy of Sciences, Beijing, China

2. School of Integrated Circuits, Tsinghua University, Beijing, China

3. School of Physics and Electronic Information, Weifang University, Weifang, China

Funder

National Natural Science Foundation of China

China Postdoctoral Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

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