Board-Level Drop Impact Reliability Analysis of Dual-Side Molding System-in- Package (SiP) Modules
Author:
Affiliation:
1. Department of Mechanical and Computer-Aided Engineering, National Formosa University, Yunlin, Taiwan
2. Advanced Semiconductor Engineering (ASE), Inc., Kaohsiung, Taiwan
Funder
Ministry of Science and Technology, Taiwan
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/10004030/09964380.pdf?arnumber=9964380
Reference27 articles.
1. Advances in the drop-impact reliability of solder joints for mobile applications
2. Drop impact reliability study of high density fan-out wafer level package
3. Wafer level CSP with ultra-high thermal reliability lead-free alloys
4. Heterogeneous Integration of Double Side SiP for IoT and 5G Application
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1. Solder Joint Reliability Comparison Under JEDEC Drop and System-Like Drop Test Conditions;2024 International Conference on Electronics Packaging (ICEP);2024-04-17
2. Thermal camera for System-in-Package (SiP) technology: Transient thermal analysis based on FPGA and Finite Element Method (FEM);AEU - International Journal of Electronics and Communications;2023-12
3. Board-Level Drop Reliability Analysis for Fine-Pitch BGA Packages in Automotive Applications;2023 IEEE CPMT Symposium Japan (ICSJ);2023-11-15
4. A reliability assessment methodology of system-in-package based virtual qualification;Microelectronics Reliability;2023-11
5. Research on the welding technology of T/R components assembled with SIP moulds;2023 24th International Conference on Electronic Packaging Technology (ICEPT);2023-08-08
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