Author:
Yamaguchi T.J.,Soma M.,Ishida M.,Musha H.,Malarsie L.
Cited by
2 articles.
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1. Accelerating Receiver Jitter Tolerance Testing on ATE;Accelerating Test, Validation and Debug of High Speed Serial Interfaces;2010-10-11
2. High-Speed I/O Interfaces;System-on-Chip Test Architectures;2008