Author:
Thakur Sanjay,Parekhji Rubin,Chandorkar A.
Cited by
2 articles.
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1. A Memory Built-In Peer-Repair Architecture for Mesh-Connected Processor Array;2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT);2022-04-18
2. Memory Testing and Self-Repair;Design and Test Technology for Dependable Systems-on-Chip